Low Voltage Intel
®
Xeon
™
Processor at 1.60 GHz, 2.0 GHz and 2.4 GHz
Datasheet 37
Figure 13. TAP Valid Delay Timing Waveform
Figure 14. Test Reset (TRST#), Async GTL+ Input, and PROCHOT# Timing Waveform
Figure 15. THERMTRIP# to V
CC
Timing
V Valid
ignal
TCK
ThTs
Tx
Tx = T63 (Valid Time)
Ts = T61 (Setup Time)
Th = T62 (Hold Time)
V = 0.5 * Vcc
V
V
T
q
T
q
T64 (TRST# Pulse Width), V=0.5*Vcc
T38 (PROCHOT# Pulse Width), V=GTLREF
=
THERMTRIP# Power Down Sequence
T39 < 0.5 seconds
Note: THERMTRIP# is undefined when RESET is active
THERMTRIP#
Vcc
T39
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